DS620U+【PDF 11/15 页】IC THERMOMETER/STAT DIG 8MSOP

收藏本站

您好，
买卖IC网欢迎您。
请登录
免费注册

买卖IC网

Sheet目录40

7页 8页 9页 10页 [11页]12页 13页 14页 15页

DS620 Digital Thermometer and Thermostat

11 of 15

is acting as a receiver, it uses a NACK instead of an ACK after the last data byte to indicate that it is finished

receiving data. The master indicates a NACK by leaving the SDA line high during the ACK clock cycle.

Slave Address: Every slave device on the bus has a unique 7-bit address that allows the master to access that

device. The DS620s 7-bit bus address is 1 0 0 1 A

, where A

, A

, and A

are user-selectable via the

corresponding input pins. The three address pins allow up to eight DS620s to be multidropped on the same bus.

Control Byte: The control byte is transmitted by the master and consists of the 7-bit slave address plus a

read/write (R/W) bit (see Figure 7). If the master is going to read data from the slave device then R/W = 1, and if

the master is going to write data to the slave device then R/W = 0.

Address Byte: The address byte is used by the master to tell the DS620 which address location in the memory

map in Table 4 is going to be accessed during communication or which command should be performed. See

Command Set section.

Figure 6. START, STOP, AND ACK SIGNALS

Figure 7. Control Byte

bit 7 bit 6

bit 5

bit 4

bit 3

bit 2

bit 1

bit 0

R/W?/SPAN>?/SPAN>

GENERAL 2-WIRE INFORMATION

All data is transmitted MSb first over the 2-wire bus.

One bit of data is transmitted on the 2-wire bus each SCL period.

A pullup resistor is required on the SDA line and, when the bus is idle, both SDA and SCL must remain in a logic-

high state.

All bus communication must be initiated with a START condition and terminated with a STOP condition. During a

START or STOP is the only time SDA is allowed to change states while SCL is high. At all other times, changes

on the SDA line can only occur when SCL is low: SDA must remain stable when SCL is high.

After every 8-bit (1-byte) transfer, the receiving device must answer with an ACK (or NACK), which takes one

SCL period. Therefore, nine clocks are required for every one-byte data transfer.

INITIATING 2-WIRE COMMUNICATION

To initiate 2-wire communication, the master generates a START followed by a control byte containing the DS620

slave address. The R/W bit of the control byte must be a 0 (write) since the master next writes a command byte or

an address byte. The DS620 responds with an ACK after receiving the control byte. This must be followed by a

command byte from the master which indicates what type of command operation is to be performed, or an address

byte when the master intends to write to or read from the DS620. The DS620 again responds with an ACK after

receiving the command or address byte. The master can then issue a STOP to signal the end of the

communication sequence, or continue writing to the address memory. See the Command Set section for details on

SCL

SDA

START

Condition

STOP

Condition

ACK (or NACK)

From Receiver

发布紧急采购，3分钟左右您将得到回复。

采购需求

(若只采购一条型号，填写一行即可)

*型号	*数量	厂商	批号	封装

添加更多采购

采购需求

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

我的联系方式